LV24010LP Datasheet, PDF (2/18 Pages) Sanyo Semicon Device – Bi-CMOS LSI Compact Portable Equipment 1-Chip FM+RDS Tuner IC

LV24010LP
Electrical Characteristics at Ta = 25°C, VCC = 3.0V, VDD = 3.0V, in the measuring circuit specified, Soft
Mute/Stereo = off
Parameter
Symbol
Conditions
Ratings
min
typ
Current drain
(in operation)
Current drain
(in standby)
FM receive band
ICCA
Measurement at pin 23 with 60 dBµ input in the
15
analog block, Monaural input
ICCD
Measurement at pins 27 and 40 with 60 dBµ input in
0.2
0.4
the digital block
ICCA
Measurement at pin 23 in the standby mode of the
3
analog block
ICCD
Measurement at pins 27 and 40 in the standby
3
mode of the digital block.
F_range
76
FM receive characteristics;MONO: fc = 80MHz,fm = 1kHz, 22.5kHzdev. Note that Soft_stereo,Soft_and mute functions are OFF.
3dB sensitivity
Practical sensitivity 1
Practical sensitivity 2
(Reference)
Demodulation output
-3dB LS
QS1
QS2
Vo
60dBµV, 22.5kHzdev output standard,
-3dB input -3dB.
Input level with S/N = 30dB,
Deemphasis = 75µs SG open display
Input level with S/N = 26dB,
Deemphasis = 75µs, SG terminal display
60dBµV, pin 11 output
13
10
1.25
50
70
Channel balance
CB
60dBµV, pin 11 output / pin 12 output
-2
0
Signal-to-noise ratio
S/N
60dBµV, pin 11 output
48
58
Total harmonic distortion
1(MONO)
Total harmonic distortion
2(MONO)
Field intensity display level
THD1
THD2
FS
60dBµV, pin 11 output, 22.5kHdev
60dBµV, pin 11 output, 75kHdev
Input level at which FS1 changes to FS2
0.4
1.3
6
16
Mute attenuation
Mute-Att
60dBµV, pin 11 output
60
70
FM receive characteristics; STEREO: fc = 80MHz, fm = 1kHz, VIN = 60dBµV, L+R = 30% (22.5kHz), Pilot = 10% (7.5kHzdev)
Separation
SEP
L-mod, pin 11 output / pin 12 output
20
35
Total harmonic distortion
THD-ST
Main-mod (for L+R input), pin 11 / pin 12 output,
0.6
(Main)
IHF_BPF
RDS characteristics
RDS_center frequency
-3dB bandwidth
RDS Current drain
fcen
Adjustment accuracy of RDS_VCO DAC value.
(Adjustment accuracy of free_run frequency)
56.5
57.0
BW-3dB
Bandwidth of BPF to 57KHZ Center frequency. Set
(3.0)
5.5
Block4 register 06h of Bit3-2 (RDSBW) to “11”
( ) is not guarantee value. Just for Reference value
Irds
RDS current value at RDS Enable/Disable
2
max
19
0.8
30
30
108
20
17
110
2
1.5
3
26
1.8
57.5
(7.0)
4
unit
mA
mA
µA
µA
MHz
dBµV
EMF
dBµV
EMF
µV
mV
dB
dB
%
%
dBµ
dB
dB
%
kHz
kHz
mA
The output level is set to the VOL = 14 when the block 2, register 09h of control register map has the bit 3,2,1,0 = “0010”
In other cases:
• The IF_OSC frequency must be adjust to 140kHz with DAC of block 1, register 05h.
• The IF_CENTER set bit value (block 2, register 03h) applies to same DAC value of IF_OSC.
• The IF_BW set bit value (block2, register 05h) applies to the setting of the value 65% of the IF_OSC set bit value.
• The RDS_OSC frequency must be adjust to 114kHz with DAC of block 4, register 07h.
• The RDS_FLTDAC (block 4, register 03h) set bit value applies to the setting of value 95% of RDS_OSC set bit value.
No.A0466-2/18