LV24010LP Datasheet, PDF (12/18 Pages) Sanyo Semicon Device – Bi-CMOS LSI Compact Portable Equipment 1-Chip FM+RDS Tuner IC

LV24010LP
Block 2, Register 02h - RADIO_CTRL1 - Radio Control 1 Register (Write-only)
7
6
5
4
3
2
EN_MEAS
EN_AFC
Reserved
Reserved
DIR_AFC
RST_AFC
bit 7:
EN_MEAS: Enable measurement bit.
0 = Normal mode.
1 = Measurement mode.
bit 6:
EN_AFC: Enable AFC bit.
0 = Disable AFC.
1 = Enable AFC.
bit 5:
Reserved: should be written with 0.
bit 4:
Reserved: should be written with 1.
bit 3:
DIR_AFC: AFC direction bit .
0 = AFC normal direction.
1 = AFC reverse direction (for test purpose).
bit 2:
RST_AFC: Reset AFC bit.
0 = Normal operation.
1 = Reset AFC to the middle of the control range.
bit 1:
Reserved: should be written with 1.
bit 0:
Reserved: should be written with 1.
1
Reserved
0
Reserved
Block 2, Register 03h - IF_CENTER - IF Center Frequency Register (Write-only)
7
6
5
4
3
2
1
0
IFCOSC[7:0]
bit 7-0:
IFCENT[7:0]: Value for centering the IF frequency .
Block 2, Register 05h - IF_BW - IF Bandwidth Register (Write-only)
7
6
5
4
3
2
1
0
IFBW[7:0]
Bit 7-0:
IFBW[7:0]: Value for IF bandwidth.
Block 2, Register 06h - RADIO_CTRL2 - Radio Control 2 Register (Write-only)
7
VREF2
bit 7:
6
5
VREF
STABI_BP
VREF2: VREF2 control bit.
0 = VREF2 is ON.
1 = VREF2 is OFF.
4
IF_PM_L
3
Reserved
2
Reserved
bit 6:
VREF: VREF control bit.
0 = VREF is ON.
1 = VREF is OFF.
bit 5:
STABI_BP: Stabi Bypass bit.
0 = Internal voltage is Vstabi (normal operation).
1 = Internal voltage is VCC (stabi bypassed).
bit 4:
IF_PM_L: IF PLL mute bit.
0 = IF PLL mute on (presetting IF mode).
1 = IF PLL mute off (normal operation mode).
bit 3:
Reserved: should be written with 0.
bit 2:
Reserved: should be written with 0.
bit 1:
AGCSP: AGC speed control bit.
0 = Normal speed.
1 = High speed.
Note: Turn on this bit will speed up the field strength measurement (fast tuning).
bit 0:
Reserved: should be written with 0.
1
AGCSP
0
AM_ANT_BSW
No.A0466-12/18