S3C72P9 Datasheet, PDF (88/225 Pages) Samsung semiconductor – SINGLE-CHIP MICROCONTROLLER HAS BEEN DESIGNED FOR HIGH PERFORMANCE USING

MEMORY MAP
S3C72P9/P72P9 (Preliminary Spec)
TMOD0 — Timer/Counter 0 Mode Register
T/C0
F91H, F90H
Bit
Identifier
RESET Value
Read/Write
Bit Addressing
TMOD0.7
7
6
5
4
3
2
1
0
"0"
.6
.5
.4
.3
.2
"0"
"0"
0
0
0
0
0
0
0
0
W
W
W
W
W
W
W
W
8
8
8
8
1/8
8
8
8
Bit 7
0 Always logic zero
TMOD0.6 – .4
Timer/Counter 0 Input Clock Selection Bits
0 0 0 External clock input at TCL0 pin on rising edge
0 0 1 External clock input at TCL0 pin on falling edge
1 0 0 fxx/2¹⁰ (4.09 kHz)
1 0 1 fxx/2⁶ (65.5 kHz)
1 1 0 fxx/2⁴ (262 kHz)
1 1 1 fxx (4.19 MHz)
NOTE: “fxx” is selected system clock of 4.19 MHz
TMOD0.3
TMOD0.2
TMOD0.1
TMOD0.0
Clear Counter and Resume Counting Control Bit
1 Clear TCNT0, IRQT0, and TOL0 and resume counting immediately
(This bit is cleared automatically when counting starts.)
Enable/Disable Timer/Counter 0 Bit
0 Disable timer/counter 0; retain TCNT0 contents
1 Enable timer/counter 0
Bit 1
0 Always logic zero
Bit 0
0 Always logic zero
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