S3C72P9 Datasheet, PDF (136/225 Pages) Samsung semiconductor – SINGLE-CHIP MICROCONTROLLER HAS BEEN DESIGNED FOR HIGH PERFORMANCE USING

S3C72P9/P72P9 (Preliminary Spec)
PORT 2 CIRCUIT DIAGRAM
I/O PORTS
VDD
PUR2
PUR2
PUR2
P2.0/CLO
P2.1/LCDCK
P2.2/LCDSY
Type B
PNE2.x
Input
Data
PM2.x
x=0-2
VDD
P-Ch
Output
Data
N-Ch
CLO
Type B
LCDCK
Type B
LCDSY
Type B
CMOS Push-Pull,
N-Channel
Open-Drain
PM2.0
PM2.1
PM2.2
PM2.2
PM2.1
PM2.0
1, 4
Output
Latch
MUX
1, 4
NOTE: When a port pin serves as an output, its pull-up resistor is automatically disabled, even though the
port's pull-up resistor is enabled by bit settings in the pull-up resistor-mode register (PUMOD).
Figure 10-3. Port 2 Circuit Diagram
10-7