S3C72P9 Datasheet, PDF (37/225 Pages) Samsung semiconductor – SINGLE-CHIP MICROCONTROLLER HAS BEEN DESIGNED FOR HIGH PERFORMANCE USING

S3C72P9/P72P9 (Preliminary Spec)
ADDRESSING MODES
3 ADDRESSING MODES
OVERVIEW
The enable memory bank flag, EMB, controls the two addressing modes for data memory. When the EMB flag is
set to logic one, you can address the entire RAM area; when the EMB flag is cleared to logic zero, the
addressable area in the RAM is restricted to specific locations.
The EMB flag works in connection with the select memory bank instruction, SMBn. You will recall that the SMBn
instruction is used to select RAM bank 0, 1, 2, 3, 4 or 15. The SMB setting is always contained in the upper four
bits of a 12-bit RAM address. For this reason, both addressing modes (EMB = "0" and EMB = "1") apply
specifically to the memory bank indicated by the SMB instruction, and any restrictions to the addressable area
within banks 0, 1, 2, 3, 4 or 15. Direct and indirect 1-bit, 4-bit, and 8-bit addressing methods can be used.
Several RAM locations are addressable at all times, regardless of the current EMB flag setting.
Here are a few guidelines to keep in mind regarding data memory addressing:
— When you address peripheral hardware locations in bank 15, the mnemonic for the memory-mapped
hardware component can be used as the operand in place of the actual address location.
— Always use an even-numbered RAM address as the operand in 8-bit direct and indirect addressing.
— With direct addressing, use the RAM address as the instruction operand; with indirect addressing, the
instruction specifies a register which contains the operand's address.
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