DS_K6F2008U2E Datasheet, PDF (6/10 Pages) Samsung semiconductor – 256Kx8 bit Super Low Power and Low Voltage Full CMOS Static RAM

K6F2008U2E Family
CMOS SRAM
TIMING DIAGRAMS
TIMING WAVEFORM OF READ CYCLE(1) (Address Controlled, CS1=OE=VIL, WE=VIH)
Address
Data Out
tRC
tAA
tOH
Previous Data Valid
Data Valid
TIMING WAVEFORM OF READ CYCLE(2) (WE=VIH)
Address
CS1
tRC
tAA
tCO1
CS2
OE
Data out
High-Z
tCO2
tOE
tOLZ
tLZ
tOH
tHZ(1,2)
Data Valid
tOHZ
NOTES (READ CYCLE)
1. tHZ and tOHZ are defined as the time at which the outputs achieve the open circuit conditions and are not referenced to output voltage
levels.
2. At any given temperature and voltage condition, tHZ(Max.) is less than tLZ(Min.) both for a given device and from device to device
interconnection.
6
Revision 2.0
April 2002