DS_K6F2008U2E Datasheet, PDF (4/10 Pages) Samsung semiconductor – 256Kx8 bit Super Low Power and Low Voltage Full CMOS Static RAM

K6F2008U2E Family
CMOS SRAM
RECOMMENDED DC OPERATING CONDITIONS¹⁾
Item
Symbol
Supply voltage
Vcc
Ground
Vss
Input high voltage
VIH
Input low voltage
VIL
Note:
1. Industrial Product: TA=-40 to 85°C, unless otherwise specified
2. Overshoot: Vcc+2.0V in case of pulse width≤20ns
3. Undershoot: -2.0V in case of pulse width≤20ns
4. Overshoot and undershoot are sampled, not 100% tested.
Min
2.7
0
2.2
-0.2³⁾
Typ
Max
Unit
3.0
3.3
V
0
0
V
-
Vcc+0.2²⁾
V
-
0.6
CAPACITANCE¹⁾ (f=1MHz, TA=25°C)
Item
Symbol
Input capacitance
CIN
Input/Output capacitance
CIO
1. Capacitance is sampled, not 100% tested.
Test Condition
VIN=0V
VIO=0V
Min
Max
Unit
-
8
pF
-
10
pF
DC AND OPERATING CHARACTERISTICS
Item
Input leakage current
Output leakage current
Average operating current
Output low voltage
Output high voltage
Standby Current(CMOS)
Symbol
Test Conditions
Min Typ¹⁾ Max Unit
ILI VIN=Vss to Vcc
-1
-
1 µA
ILO CS1=VIH or CS2=VIL or OE=VIH or WE=VIL, VIO=Vss to Vcc -1
-
1 µA
ICC1
Cycle time=1µs, 100% duty, IIO=0mA, CS1≤0.2V,
CS2≥VCC-0.2V, VIN≤0.2V or VIN≥VCC-0.2V
-
-
2 mA
ICC2
Cycle time=Min, 100% duty, IIO=0mA, CS1=VIL,
CS2=VIH, VIN=VIL or VIH
70ns -
55ns -
-
15 mA
-
20 mA
VOL IOL=2.1mA
VOH IOH =-1.0mA
Other inputs=Vss to Vcc
ISB1 1) CS1≥Vcc-0.2V, CS2≥Vcc-0.2V(CS1 controlled) or
2) 0V≤CS2≤0.2V CS2 controlled)
-
- 0.4 V
2.4 -
-
V
- 0.5 10 µA
1. Typical value are measured at VCC=3.0V, TA=25°C, and not 100% tested.
4
Revision 2.0
April 2002