DS_K7B803625B Datasheet, PDF (5/19 Pages) Samsung semiconductor – 256Kx36 & 512Kx18-Bit Synchronous Burst SRAM

K7B803625B
K7B801825B
PIN CONFIGURATION(TOP VIEW)
256Kx36 & 512Kx18 Synchronous SRAM
N.C.
1
N.C.
2
N.C.
3
VDDQ
4
VSSQ
5
N.C.
6
N.C.
7
DQb0
8
DQb1
9
VSSQ
10
VDDQ
11
DQb2
12
DQb3
13
N.C.
14
VDD
15
N.C.
16
VSS
17
DQb4
18
DQb5
19
VDDQ
20
VSSQ
21
DQb6
22
DQb7
23
DQPb
24
N.C.
25
VSSQ
26
VDDQ
27
N.C.
28
N.C.
29
N.C.
30
100 Pin TQFP
(20mm x 14mm)
K7B801825B(512Kx18)
80
A10
79
N.C.
78
N.C.
77
VDDQ
76
VSSQ
75
N.C.
74
DQPa
73
DQa7
72
DQa6
71
VSSQ
70
VDDQ
69
DQa5
68
DQa4
67
VSS
66
N.C.
65
VDD
64
ZZ
63
DQa3
62
DQa2
61
VDDQ
60
VSSQ
59
DQa1
58
DQa0
57
N.C.
56
N.C.
55
VSSQ
54
VDDQ
53
N.C.
52
N.C.
51
N.C.
PIN NAME
SYMBOL
PIN NAME
A0 - A18
Address Inputs
ADV
ADSP
ADSC
CLK
CS1
CS2
CS2
WEx
OE
GW
BW
ZZ
LBO
Burst Address Advance
Address Status Processor
Address Status Controller
Clock
Chip Select
Chip Select
Chip Select
Byte Write Inputs
Output Enable
Global Write Enable
Byte Write Enable
Power Down Input
Burst Mode Control
TQFP PIN NO.
SYMBOL
32,33,34,35,36,37,43
44,45,46,47,48,49,50
80,81,82,99,100
83
84
85
89
98
97
92
93,94
86
88
87
64
31
VDD
VSS
N.C.
DQa0 ~ a7
DQb0 ~ b7
DQPa, Pb
VDDQ
VSSQ
PIN NAME
Power Supply(+3.3V)
Ground
No Connect
Data Inputs/Outputs
Output Power Supply
(2.5V or 3.3V)
Output Ground
TQFP PIN NO.
15,41,65,91
17,40,67,90
1,2,3,6,7,14,16,25,28,29,
30,38,39,42,51,52,53,56,
57,66,75,78,79,95,96
58,59,62,63,68,69,72,73
8,9,12,13,18,19,22,23
74,24
4,11,20,27,54,61,70,77
5,10,21,26,55,60,71,76
Notes : 1. A0 and A1 are the two least significant bits(LSB) of the address field and set the internal burst counter if burst is desired.
2. The pin 42 is reserved for address bit for the 16Mb .
-5-
Nov. 2003
Rev 3.0