S3C2400 Datasheet, PDF (423/488 Pages) Samsung semiconductor – RISC MICROPROCESSOR

S3C2400 RISC MICROPROCESSOR
IIS-BUS INTERFACE
IIS FIFO REGISTER (IISFIF)
IIS bus interface contains two 16-byte FIFO for the transmit and receive mode. Each FIFO has 16-width and 8-depth
form, which allows the FIFO to handles data by halfword unit regardless of valid data size. Transmit and receive FIFO
access is performed through FIFO entry; the address of FENTRY is 0x15508010.
Register
IISFIF
Address
0x15508010(Li/HW)
0x15508012(Bi/HW)
R/W
R/W
Description
IIS FIFO register
Reset Value
0x0
IISFIF
FENTRY
Bit
Description
[15:0] Transmit/Receive data for IIS
Initial State
0
NOTES:
1. The IISFIF register can be accessed by halfword and word unit using STRH and LDRH instructions or short int type
pointer in Little/Big endian mode.
2. (Li/HW): Access by halfword unit when the endian mode is Little.
(Bi/HW): Access by halfword unit when the endian mode is Big.
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