S3C2400 Datasheet, PDF (302/488 Pages) Samsung semiconductor – RISC MICROPROCESSOR

S3C2400X01 RISC MICROPROCESSOR
USB DEVICE
TEST MODE CONTROL REGISTER (TEST_MODE)
Don't write this register in normal operation.
Register
TEST_MODE
Address
R/W
0x152001F4
W
Description
Test mode control register
Reset Value
0x00000000
TEST_MODE
Reserved
EP1234_MEM
_TEST
EP0_MEM_TEST
Bit
[31:2]
[1]
[0]
MCU
W
W
USB
R
R
Description
The MCU sets this bit to test EP1,
EP2, EP3, and EP4 FIFO memory.
This is set, and then the MCU can
access EP1, EP2, EP3, and EP4 FIFO
memory directly.
0 = Test disable
(Normal operation mode)
1 = Test enable
The MCU sets this bit to test EP0 FIFO
memory.
This is set, and then the MCU can
access EP0 FIFO memory directly.
0 = Test disable
(Normal operation mode)
1 = Test enable
Initial State
0
0
0
IN PACKET NUMBER CONTROL REGISTER (IN_CON_REG)
This register can control number of in packet terms of SOF(Start Of Frame)
Register
IN_CON_REG
Address
R/W
0x152001F8
W
Description
In packet number control register
Reset Value
0x00FF
IN_CON_REG
Reserved
IN_CON_MASK
IN_CON
Bit
[31:8]
[7]
[6:0]
MCU
W
W
USB
R
R
Description
IN CON function masking
0 = Enable
1 = Masked (Normal operation mode)
This data is number of in packet terms
of SOF. If this data were 3, USB Device
responses NAK to 4th in packet.
Initial State
0
1
1111111
13-17