S5N8943B Datasheet, PDF (11/22 Pages) Samsung semiconductor – G.Lite ADSL Analog Front End IC

4. DIGITAL SIGNAL INTERFACE
S5N8943B
G.Lite ADSL Analog Front End IC
4.1 Command Signal Interface
This description hold for ATU-R (S5N8943B01).
The chip consists of four kinds of register map:
- Power Control
- Transmitter AGC
- Receiver AGC
- VCXO Control
- Clock Selection
Serial interfaces use three pins:
- Clock
- Serial data input(25-bit: 2bit cs + 5bit address + 1bit r/w + 16 bit data + 1bit dummy)
- Serial data output(16 bit data)
- Enable
REGISTER
PWR_CTL
TX_AGC
RX_AGC
VCXO_CTL
CLK_SEL
Serial Data Configuration
Serial Data (SDAT)
D
R
U
CS
ADDRESS
/
DATA
M
W
M
Y
C
S
1
C
S
0
A
4
A
3
A
2
A
1
A
0
RD
/1
W5
D
1
4
D
1
3
D
1
2
D
1
1
D
1
0
D
9
D
8
D
7
D
6
D
5
D
4
D
3
D
2
D
1
D
0
X
CC
R
PPPPPPPP
SS XX 0 0 0/ XXXXXXXXCCCCCCCC X
10
W
76543210
CC
R
TTTTTTTT
SS XX 0 0 1/ XXXXXXXXAAAAAAAA X
10
W
76543210
C
S
1
C
S
0
X
X
0
1
0
R
/X
W
X
X
R
A
1
2
R
A
1
1
R
A
1
0
R
A
9
R
A
8
R
A
7
R
A
6
R
A
5
R
A
4
R
A
3
R
A
2
R
A
1
R
A
0
X
CC
R
VVVVVVVVVV
SS XX 0 1 1/ XXX XXXCCCCCCCCCC X
10
W
9876543210
CC
R
CC
SS XX 1 0 0/ XXX XXXXX XXX XXXKK X
10
W
10
X = Don’ t care
R/W =0 -> Read
R/W =1 -> Write
CONFIDENTIAL
Preliminary Information (Rev.1.0)
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