S5N8943B Datasheet, PDF (10/22 Pages) Samsung semiconductor – G.Lite ADSL Analog Front End IC

S5N8943B
G.Lite ADSL Analog Front End IC
3. BLOCK DESCRIPTIONS
3.1 ADC / DAC
S5N8943B01 has a 14bit resolution ADC 2.208M/4.416M/8.832M sample
frequency. The input of ADC is fully differential 2.0Vppd Max. The ADC
transforms the signal into a digital 14bit output.
There are two type of DAC’ s in S5N8943B01. One is for TX. It is 14bit
4.416MHz/8.832MHz frequency. Samsung’ s DMT(S5N8944) transmit 14bit
parallel data to the AFE chip. The other DAC is for VCXO control. It has 10bit
resolution 4KHz frequency. Internal registers of S5N8943B01 transform 10bit
VCXO control serial data from DSP into 10bit parallel data. And VCXO output
analog signal CONT_DAX(Pin #40).
3.2 TX/RX LPF
3.2.1 RX FILTERS
The combination of the external filter ( an LC ladder filter typically ) with the
integrated low pass filter must provide:
-
DMT sidelobe and out of band ( anti-aliasing ) attenuation
-
Anti alias filter ( 60dB rejection @ image frequency )
-
On chip tuning circuit included.
3.2.2 TX FILTERS
The TX Filters act not only to suppress the DMT sidebands but also as
smoothing filters on the D/A converter’ s output to suppress the image spectrum.
For this reason they are realized in a time continuous approach and on chip
tuning circuit included
3.3 TX/RX AGC
TX AGC has 0~-24dB gains with 2dB step. It is controlled through 8bit serial
digital signal from DSP. Internal registers of Samsung AFE Chips transform
8bit parallel control data. It outputs 2Vppd fully differential signal to line driver.
RX AGC has low noise 0~42dB gains with 0.4dB step and It is controlled
through 12bit + 1MSB control signal. If 1MSB is high, another RX input pass
pin#55 RX_INNG #56 RX_INNP(external -14dB gain pass) is seclected. It inputs
2Vppd fully differential signal to RX LPF.
CONFIDENTIAL
Preliminary Information (Rev.1.0)
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