BU6569GVW Datasheet, PDF (2/17 Pages) Rohm – Camera Image Processor with ADPCM / MIDI / MP3 / AAC / HE-AAC Audio

BU6569GVW
Technical Note
6) Built-in JPEG CODEC
ISO/IEC10918 conforming base line method.
ï½¥Compression
For YUV=4:2:2 format only.
Quantization table selectable from 32 built-in tables.
ï½¥Decompression
For YUV=4:4:4, 4:2:2(horizontal sub-sampling), 4:2:0, 4:1:1(horizontal sub-sampling), and gray scale.
7) Built-in HOST CPU interface
Adaptable to 16bit bus interface.
Read/Write access to/from frame memory.
Read/Write access to/from internal registers (Indirect access with a index register as the address).
Read/Write access to/from the LCD controller: Parallel/Serial (Direct access available via the LCD interface).
8) Built-in USB interface
USB 2.0 FS adaptable to mass storage class.
9) Built-in NAND Flash memory interface
Adaptable to 8bit and 16bit width for data bus.
ECC calculation by BU6569GVW.
10) Built-in SD card interface
Built-in host controller block of SD card interface, MMC interface.
11) AAC Decode
Supporting Advanced Audio Coding, Low complexity (AAC-LC)
Supporting High Efficiency Advanced Audio Coding (HE-AAC)
12) MP3 Decode
ISO/IEC 11172-3 (32, 44.1 or 48 KHz)
13) Melody source
Simultaneous generation of up to 64 polyphonic tones out of a tone palette of 128 sounds plus 47 drum set sounds,
15 electric drum set sounds, and 32 effect sounds. Up to 8 user customized sound can be used to create original
sounds.
Supporting 12-bit pitch bending and modulation support.
Plays up to four songs simultaneously and supports real-time modification of tempo, key, volume, and pan pot.
14) ADPCM CODEC
Built-in ADPCM decoder/PCM player (2 channels), enables mixing with melody.
Built-in ADPCM encoder/PCM recorder (1 channel).
15) IIS, PCM interface
Digital input
・IIS interface (IIS, Standard Left Justified format, and Standard Right Justified format)
・PCM interface (G711.1 u-Law, G711.1 A-Law, Linear (negative number is expressed as 2's-complement.))
Digital output
・IIS interface (IIS, Standard Left Justified format)
16) Stereo DAC block
Built-in a stereo digital-analog converter.
The DAC block's dynamic range is 1.98 Vpp (typ.)
LPF is included as a smoothing filter subsequent to DAC output, which can eliminate the high-frequency
components of the generated analog waveform.
17) Auto Play
AAC/HE-AAC/MP3 music can be played automatically in SD card or Flash memory of 512B/page and 2KB/page by
using auto play file list (link information of page address) written into Play List RAM by HOST CPU.
18) Clock generation, power management function
Two oscillation circuits configuration by XIN1, 2 and XOUT1, 2 terminals, or clock input available from the XIN1, 2
terminal. Built-in two PLL circuits enable clock multiplication.
Clock control of BU6569GVW inside in unit of block (suspend mode available.)
＊Data is prepared separately about each register setup. Please refer to the Development Scheme on page 14.
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2009.07 - Rev.A