TMS320TCI6487 Datasheet, PDF (93/206 Pages) Texas Instruments – Communications Infrastructure Digital Signal Processor

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HEX ADDRESS
02A0 2E1C
02A0 2E20
02A0 2E24
02A0 2E28
02A0 2E2C
02A0 2E30
02A0 2E34
02A0 2E38
02A0 2E3C
02A0 2E40
02A0 2E44
02A0 2E48 - 02A0 2E4C
02A0 2E50
02A0 2E54
02A0 2E58
02A0 2E5C
02A0 2E60
02A0 2E64
02A0 2E68
02A0 2E6C
02A0 2E70
02A0 2E74
02A0 2E78
02A0 2E7C
02A0 2E80
02A0 2E84
02A0 2E88
02A0 2E8C
02A0 2E90
02A0 2E94
02A0 2E98 - 02A0 2FFF
TMS320TCI6487
TMS320TCI6488
Communications Infrastructure Digital Signal Processor
SPRS358F – APRIL 2007 – REVISED AUGUST 2008
Table 8-3. EDMA3 Registers (continued)
ACRONYM
CERH
EER
EERH
EECR
EECRH
EESR
EESRH
SER
SERH
SECR
SECRH
-
IER
IERH
IECR
IECRH
IESR
IESRH
IPR
IPRH
ICR
ICRH
IEVAL
-
QER
QEER
QEECR
QEESR
QSER
QSECR
-
REGISTER NAME
Chained Event Register Hig
Event Enable Register
Event Enable Register High
Event Enable Clear Register
Event Enable Clear Register High
Event Enable Set Register
Event Enable Set Register High
Secondary Event Register
Secondary Event Register High
Secondary Event Clear Register
Secondary Event Clear Register High
Reserved
Interrupt Enable Register
Interrupt Enable Register High
Interrupt Enable Clear Register
Interrupt Enable Clear Register High
Interrupt Enable Set Register
Interrupt Enable Set Register High
Interrupt Pending Register
Interrupt Pending Register High
Interrupt Clear Register
Interrupt Clear Register High
Interrupt Evaluate Register
Reserved
QDMA Event Register
QDMA Event Enable Register
QDMA Event Enable Clear Register
QDMA Event Enable Set Register
QDMA Secondary Event Register
QDMA Secondary Event Clear Register
Reserved
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Peripheral Information and Electrical Specifications
93