English
Language : 

TMS320TCI6487 Datasheet, PDF (194/206 Pages) Texas Instruments – Communications Infrastructure Digital Signal Processor
TMS320TCI6487
TMS320TCI6488
Communications Infrastructure Digital Signal Processor
SPRS358F – APRIL 2007 – REVISED AUGUST 2008
www.ti.com
Table 8-78. Antenna Interface System Registers (continued)
HEX ADDRESS
02BF 1824
02BF 1828
02BF 182C
02BF 1830
02BF 1834
02BF 1838 - 02BF 1FFC
02BF 2000
02BF 2004
02BF 2008
02BF 200C
02BF 2010
02BF 2014
02BF 2018
02BF 201C
02BF 2020
02BF 2024
02BF 2028
02BF 202C
02BF 2030
02BF 2034
02BF 2038 - 02BF 27FC
02BF 2800
02BF 2804
02BF 2808
02BF 280C
02BF 2810
02BF 2814
02BF 2818
02BF 281C
02BF 2820
ACRONYM
EE_LINK3_MSK_SET_B_EV1
EE_LINK3_MSK_CLR_A_EV0
EE_LINK3_MSK_CLR_B_EV0
EE_LINK3_MSK_CLR_A_EV1
EE_LINK3_MSK_CLR_B_EV1
-
EE_LINK4_IRS_A
EE_LINK4_IRS_B
EE_LINK4_IMS_A_EV0
EE_LINK4_IMS_B_EV0
EE_LINK4_IMS_A_EV1
EE_LINK4_IMS_B_EV1
EE_LINK4_MSK_SET_A_EV0
EE_LINK4_MSK_SET_B_EV0
EE_LINK4_MSK_SET_A_EV1
EE_LINK4_MSK_SET_B_EV1
EE_LINK4_MSK_CLR_A_EV0
EE_LINK4_MSK_CLR_B_EV0
EE_LINK4_MSK_CLR_A_EV1
EE_LINK4_MSK_CLR_B_EV1
-
EE_LINK5_IRS_A
EE_LINK5_IRS_B
EE_LINK5_IMS_A_EV0
EE_LINK5_IMS_B_EV0
EE_LINK5_IMS_A_EV1
EE_LINK5_IMS_B_EV1
EE_LINK5_MSK_SET_A_EV0
EE_LINK5_MSK_SET_B_EV0
EE_LINK5_MSK_SET_A_EV1
REGISTER NAME
EE Link 3 AI_EVENT[1] Interrupt Source Mask Set
Register B
EE Link 3 AI_EVENT[0] Interrupt Source Mask Clear
Register A
EE Link 3 AI_EVENT[0] Interrupt Source Mask Clear
Register B
EE Link 3 AI_EVENT[1] Interrupt Source Mask Clear
Register A
EE Link 3 AI_EVENT[1] Interrupt Source Mask Clear
Register B
Reserved
EE Link 4 Interrupt Source Raw Status Register A
EE Link 4 Interrupt Source Raw Status Register B
EE Link 4 AI_EVENT[0] Interrupt Source Masked Status
Register A
EE Link 4 AI_EVENT[0] Interrupt Source Masked Status
Register B
EE Link 4 AI_EVENT[1] Interrupt Source Masked Status
Register A
EE Link 4 AI_EVENT[1] Interrupt Source Masked Status
Register B
EE Link 4 AI_EVENT[0] Interrupt Source Mask Set
Register A
EE Link 4 AI_EVENT[0] Interrupt Source Mask Set
Register B
EE Link 4 AI_EVENT[1] Interrupt Source Mask Set
Register A
EE Link 4 AI_EVENT[1] Interrupt Source Mask Set
Register B
EE Link 4 AI_EVENT[0] Interrupt Source Mask Clear
Register A
EE Link 4 AI_EVENT[0] Interrupt Source Mask Clear
Register B
EE Link 4 AI_EVENT[1] Interrupt Source Mask Clear
Register A
EE Link 4 AI_EVENT[1] Interrupt Source Mask Clear
Register B
Reserved
EE Link 5 Interrupt Source Raw Status Register A
EE Link 5 Interrupt Source Raw Status Register B
EE Link 5 AI_EVENT[0] Interrupt Source Masked Status
Register A
EE Link 5 AI_EVENT[0] Interrupt Source Masked Status
Register B
EE Link 5 AI_EVENT[1] Interrupt Source Masked Status
Register A
EE Link 5 AI_EVENT[1] Interrupt Source Masked Status
Register B
EE Link 5 AI_EVENT[0] Interrupt Source Mask Set
Register A
EE Link 5 AI_EVENT[0] Interrupt Source Mask Set
RegisterB
EE Link 5 AI_EVENT[1] Interrupt Source Mask Set
RegisterA
194 Peripheral Information and Electrical Specifications
Submit Documentation Feedback