TMS320TCI6487 Datasheet, PDF (23/206 Pages) Texas Instruments – Communications Infrastructure Digital Signal Processor

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DDRD[31:0]
DDRCE
14
DDRA[13:0]
DDRDQM0
DDRDQM1
DDRDQM2
DDRDQM3
TMS320TCI6487
TMS320TCI6488
Communications Infrastructure Digital Signal Processor
SPRS358F – APRIL 2007 – REVISED AUGUST 2008
Data
Memory Map
Address
Byte Enables
External
Memory
Controller
DDRCLKOUTP
DDRCLKOUTN
DDRCAS
DDRRAS
DDRWE
DDRDQSP[3:0]
DDRDQSN[3:0]
DDRRCVENIN[2:0]
DDRRCVENOUT[2:0]
DDRODT
DDRSLRATE
V
REFSSTL
Bank Address
DDR Memory Controller (32-bit Data Bus)
Figure 2-7. DDR Memory Controller Peripheral Signals
DDRBA0
DDRBA1
DDRBA2
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