H8S-2643 Datasheet, PDF (908/1277 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcomputer

Section 22 ROM
(1) Automatic SCI Bit Rate Adjustment
Start
bit
D0
D1
D2
D3
D4
D5
D6
D7
Stop
bit
Low period (9 bits) measured (H'00 data)
High period
(1 or more bits)
Figure 22.9 Automatic SCI Bit Rate Adjustment
When boot mode is initiated, the H8S/2643 Group measures the low period of the asynchronous
SCI communication data (H'00) transmitted continuously from the host. The SCI transmit/receive
format should be set as follows: 8-bit data, 1 stop bit, no parity. The H8S/2643 Group calculates
the bit rate of the transmission from the host from the measured low period, and transmits one
H'00 byte to the host to indicate the end of bit rate adjustment. The host should confirm that this
adjustment end indication (H'00) has been received normally, and transmit one H'55 byte to the
H8S/2643 Group. If reception cannot be performed normally, initiate boot mode again (reset), and
repeat the above operations. Depending on the host’s transmission bit rate and the H8S/2643
Group’ system clock frequency, there will be a discrepancy between the bit rates of the host and
the H8S/2643 Group. Set the host transfer bit rate at 2,400, 4,800, 9,600 or 19,200 bps to operate
the SCI properly.
Table 22.10 shows host transfer bit rates and system clock frequencies for which automatic
adjustment of the H8S/2643 Group bit rate is possible. The boot program should be executed
within this system clock range.
Table 22.10 System Clock Frequencies for which Automatic Adjustment of H8S/2643 Group
Bit Rate is Possible
Host Bit Rate
2,400 bps
4,800 bps
9,600 bps
19,200 bps
System Clock Frequency for Which Automatic Adjustment
of H8S/2643 Group Bit Rate is Possible
2 to 8 MHz
4 to 16 MHz
8 to 25 MHz
16 to 25 MHz
Rev. 3.00 Jan 11, 2005 page 854 of 1220
REJ09B0186-0300O