H8S-2643 Datasheet, PDF (203/1277 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcomputer

Section 7 Bus Controller
Bit 5—BUZZ Output Enable (BUZZE): This bit enables/disables BUZZ output via the PF1 pin.
The WDT1 input clock, selected with PSS and CKS2 to CKS0, is output as the BUZZ signal. See
Section 15.2.4, Pin Function Control Register (PFCR) for details of BUZZ output.
Bit 5
BUZZE
0
1
Description
Functions as PF1 input pin
Functions as BUZZ output pin
(Initial value)
Bit 4—LCAS Output Pin Select Bit (LCASS): Selects output pin for LCAS signal.
Bit 4
LCASS
0
1
Description
Outputs LCAS signal from PF2
Outputs LCAS signal from PF6
(Initial value)
Rev. 3.00 Jan 11, 2005 page 149 of 1220
REJ09B0186-0300O