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H8S2426 Datasheet, PDF (89/1302 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcomputer H8S Family / H8S/2400 Series | |||
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Section 2 CPU
Table 2.4 Arithmetic Operations Instructions (1)
Instruction Size* Function
ADD
SUB
B/W/L
Rd ± Rs â Rd, Rd ± #IMM â Rd
Performs addition or subtraction on data in two general registers, or on
immediate data and data in a general register. (Immediate byte data
cannot be subtracted from byte data in a general register. Use the
SUBX or ADD instruction.)
ADDX
SUBX
B
Rd ± Rs ± C â Rd, Rd ± #IMM ± C â Rd
Performs addition or subtraction with carry or borrow on byte data in two
general registers, or on immediate data and data in a general register.
INC
DEC
B/W/L
Rd ± 1 â Rd, Rd ± 2 â Rd
Increments or decrements a general register by 1 or 2. (Byte operands
can be incremented or decremented by 1 only.)
ADDS
SUBS
L
Rd ± 1 â Rd, Rd ± 2 â Rd, Rd ± 4 â Rd
Adds or subtracts the value 1, 2, or 4 to or from data in a 32-bit register.
DAA
DAS
B
Rd (decimal adjust) â Rd
Decimal-adjusts an addition or subtraction result in a general register by
referring to the CCR to produce 4-bit BCD data.
MULXU
B/W Rd à Rs â Rd
Performs unsigned multiplication on data in two general registers:
either 8 bits à 8 bits â 16 bits or 16 bits à 16 bits â 32 bits.
MULXS
B/W Rd à Rs â Rd
Performs signed multiplication on data in two general registers:
either 8 bits à 8 bits â 16 bits or 16 bits à 16 bits â 32 bits.
DIVXU
B/W
Rd ÷ Rs â Rd
Performs unsigned division on data in two general registers:
either 16 bits ÷ 8 bits â 8-bit quotient and 8-bit remainder or
32 bits ÷ 16 bits â 16-bit quotient and 16-bit remainder.
Note: * Size refers to the operand size.
B: Byte
W: Word
L: Longword
Rev. 1.00 Sep. 19, 2008 Page 61 of 1270
REJ09B0466-0100
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