H8S2426 Datasheet, PDF (813/1302 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcomputer H8S Family / H8S/2400 Series

Section 12 Programmable Pulse Generator (PPG)
12.4.1 Output Timing
If pulse output is enabled, NDR contents are transferred to PODR and output when the specified
compare match event occurs. Figure 12.3 shows the timing of these operations for the case of
normal output in groups 2 and 3, triggered by compare match A.
φ
TCNT
N
N+1
TGRA
N
Compare match
A signal
NDRH
n
PODRH
m
n
PO8 to PO15
m
n
Figure 12.3 Timing of Transfer and Output of NDR Contents (Example)
Rev. 1.00 Sep. 19, 2008 Page 785 of 1270
REJ09B0466-0100