TMS320C6474 Datasheet, PDF (87/204 Pages) Texas Instruments – Multicore Digital Signal Processor

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TMS320C6474
Multicore Digital Signal Processor
SPRS552 – OCTOBER 2008
Table 7-3. EDMA3 Registers (continued)
ACRONYM
REGISTER NAME
SER
Secondary Event Register
SERH
Secondary Event Register High
SECR
Secondary Event Clear Register
SECRH
Secondary Event Clear Register High
-
Reserved
IER
Interrupt Enable Register
IERH
Interrupt Enable Register High
IECR
Interrupt Enable Clear Register
IECRH
Interrupt Enable Clear Register High
IESR
Interrupt Enable Set Register
IESRH
Interrupt Enable Set Register High
IPR
Interrupt Pending Register
IPRH
Interrupt Pending Register High
ICR
Interrupt Clear Register
ICRH
Interrupt Clear Register High
IEVAL
Interrupt Evaluate Register
-
Reserved
QER
QDMA Event Register
QEER
QDMA Event Enable Register
QEECR
QDMA Event Enable Clear Register
QEESR
QDMA Event Enable Set Register
QSER
QDMA Secondary Event Register
QSECR
QDMA Secondary Event Clear Register
-
Reserved
Shadow Region 3 Channel Registers
ER
Event Register
ERH
Event Register High
ECR
Event Clear Register
ECRH
Event Clear Register High
ESR
Event Set Register
ESRH
Event Set Register High
CER
Chained Event Register
CERH
Chained Event Register Hig
EER
Event Enable Register
EERH
Event Enable Register High
EECR
Event Enable Clear Register
EECRH
Event Enable Clear Register High
EESR
Event Enable Set Register
EESRH
Event Enable Set Register High
SER
Secondary Event Register
SERH
Secondary Event Register High
SECR
Secondary Event Clear Register
SECRH
Secondary Event Clear Register High
-
Reserved
IER
Interrupt Enable Register
IERH
Interrupt Enable Register High
IECR
Interrupt Enable Clear Register
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Peripheral Information and Electrical Specifications
87