TMS320C6474 Datasheet, PDF (151/204 Pages) Texas Instruments – Multicore Digital Signal Processor

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TMS320C6474
Multicore Digital Signal Processor
SPRS552 – OCTOBER 2008
7.14.1.1.1 Timer Input Selection Register (TINPSEL)
Timer input selection is handled in the Timer input selection register (TINPSEL). The TINPSEL register is
shown in Figure 7-35 and described in Table 7-54.
31
24
23
22
21
20
19
18
17
16
Reserved
TINPHSEL5 TINPLSEL5 TINPHSEL4 TINPLSEL4
R-00000000
R/W-01
R/W-00
R/W-01
R/W-00
15
14
TINPHSEL3
R/W-01
13
12
TINPLSEL3
R/W-00
11
10
TINPHSEL2
R/W-01
9
8
TINPLSEL2
R/W-00
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
7
6
TINPHSEL1
R/W-01
5
4
TINPLSEL1
R/W-00
3
2
TINPHSEL0
R/W-01
Figure 7-35. Timer Input Selection Register (TINPSEL)
1
0
TINPLSEL0
R/W-00
Table 7-54. Timer Input Selection Register (TINPSEL) Field Descriptions
Bit
31-24
23:22
Field
Reserved
TINPHSEL5
21:20 TINPLSEL5
19:18 TINPHSEL4
17:16 TINPLSEL4
15:14 TINPHSEL3
13:12 TINPLSEL3
Value
00
01
10
11
00
01
10
11
00
01
10
11
00
01
10
11
00
01
10
11
00
01
10
11
Description
Reserved
Input Select for TIMER 5 High
TIMI0
TIMI1
FSEVT2
FSEVT3
Input Select for TIMER 5 Low
TIMI0
TIMI1
FSEVT2
FSEVT3
Input Select for TIMER 4 High
TIMI0
TIMI1
FSEVT2
FSEVT3
Input Select for TIMER 4 Low
TIMI0
TIMI1
FSEVT2
FSEVT3
Input Select for TIMER 3 High
TIMI0
TIMI1
FSEVT2
FSEVT3
Input Select for TIMER 3 Low
TIMI0
TIMI1
FSEVT2
FSEVT3
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Peripheral Information and Electrical Specifications 151