TMS320C6474 Datasheet, PDF (159/204 Pages) Texas Instruments – Multicore Digital Signal Processor

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7.15.2 VCP2 Peripheral Register Description(s)
TMS320C6474
Multicore Digital Signal Processor
SPRS552 – OCTOBER 2008
EDMA BUS HEX ADDRESS RANGE
5800 0000
5800 0004
5800 0008
5800 000C
5800 0010
5800 0014
5800 0018 - 5800 0044
5800 0048
5800 004C
5800 0050 - 5800 007C
5800 0080
5800 0084 - 5800 009C
5800 00C0
N/A
N/A
N/A
N/A
N/A
-
N/A
N/A
5800 1000
5800 2000
5800 3000
5800 6000
5800 F000
Table 7-66. VCP2 Registers
CONFIGURATION BUS HEX
ADDRESS RANGE
-
-
-
-
-
-
-
-
-
-
N/A
ACRONYM
VCPIC0
VCPIC1
VCPIC2
VCPIC3
VCPIC4
VCPIC5
-
VCPOUT0
VCPOUT1
-
VCPWBM
-
N/A
02B8 0018
02B8 0020
02B8 0040
02B8 0044
02B8 0050
-
02B8 0060
02B8 0064 - 02B9 FFFF
-
-
-
-
-
-
VCPRDECS
VCPEXE
VCPEND
VCPSTAT0
VCPSTAT1
VCPERR
-
VCPEMU
-
BM
SM
TBHD
TBSD
IO
REGISTER NAME
VCP2 input configuration Register 0
VCP2 input configuration Register 1
VCP2 input configuration Register 2
VCP2 input configuration Register 3
VCP2 input configuration Register 4
VCP2 Input Configuration Register 5
Reserved
VCP2 output Register 0
VCP2 output Register 1
Reserved
VCP2 branch metrics write FIFO
Register
Reserved
VCP2 decisions read FIFO Register
VCP2 execution Register
VCP2 Endian mode Register
VCP2 Status Register 0
VCP2 Status Register 1
VCP2 error Register
Reserved
VCP2 emulation control Register
Reserved
Branch metrics
State metric
Traceback hard decision
Traceback soft decision
Decoded bits
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Peripheral Information and Electrical Specifications 159