H8-3067 Datasheet, PDF (854/963 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series

Appendix B Internal I/O Registers
TSNC—Timer Synchro Register
Bit 7
6
5



Initial value 1
1
1
Read/Write 


H’FFF61
16-bit timer (all channels)
4
3
2
1
0

 SYNC2 SYNC1 SYNC0
1
1
0
0
0


R/W R/W R/W
Reserved bits
Timer synchronization 0
Channel 0 timer counter (TCNT0) operates
0 independently (TCNT0 presetting/clearing is
unrelated to other channels)
(Initial value)
Channel 0 operates synchronously
1 TCNT0 synchronous presetting/synchronous
clearing is possible
Timer synchronization 1
Channel 1 timer counter (TCNT1) operates
0 independently (TCNT1 presetting/clearing is
unrelated to other channels)
(Initial value)
Channel 1 operates synchronously
1 TCNT1 synchronous presetting/synchronous
clearing is possible
Timer synchronization 2
Channel 2 timer counter (TCNT2) operates
0 independently (TCNT2 presetting/clearing is
unrelated to other channels)
(Initial value)
Channel 2 operates synchronously
1 TCNT2 synchronous presetting/synchronous
clearing is possible
Rev. 4.00 Jan 26, 2006 page 832 of 938
REJ09B0276-0400