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H8-3067 Datasheet, PDF (308/963 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series
Section 8 I/O Ports
8.6.2 Register Descriptions
Table 8.8 summarizes the registers of port 5.
Table 8.8 Port 5 Registers
Initial Value
Address* Name
Abbreviation R/W Modes 1 to 4 Modes 5 to 7
H'EE004 Port 5 data direction register
P5DDR
W H'FF
H'F0
H'FFFD4 Port 5 data register
P5DR
R/W H'F0
H'F0
H'EE03F Port 5 input pull-up control register P5PCR
R/W H'F0
H'F0
Note: * Lower 20 bits of the address in advanced mode.
Port 5 Data Direction Register (P5DDR): P5DDR is an 8-bit write-only register that can select
input or output for each pin in port 5.
Bits 7 to 4 are reserved. They are fixed at 1, and cannot be modified.
Bit
7
6
5
4
3
2
1
0
—
—
—
— P53DDR P52DDR P51DDR P50DDR
Modes Initial value 1
1
1
1
1
1
1
1
1 to 4 Read/Write —
—
—
—
—
—
—
—
Modes Initial value 1
1
1
1
0
0
0
0
5 to 7 Read/Write —
—
—
—
W
W
W
W
Reserved bits
Port 5 data direction 3 to 0
These bits select input or
output for port 5 pins
Modes 1 to 4 (Expanded Modes with On-Chip ROM Disabled): P5DDR values are fixed at 1.
Port 5 functions as an address bus.
Modes 5 (Expanded Modes with On-Chip ROM Enabled): Following a reset, port 5 is an input
port. A pin in port 5 becomes an address output pin if the corresponding P5DDR bit is set to 1, and
an input port if this bit is cleared to 0.
Mode 6 and 7 (Single-Chip Mode): Port 5 functions as an input/output port. A pin in port 5
becomes an output port if the corresponding P5DDR bit is set to 1, and an input port if this bit is
cleared to 0.
In modes 1 to 4, P5DDR bits are always read as 1, and cannot be modified.
Rev. 4.00 Jan 26, 2006 page 286 of 938
REJ09B0276-0400