M16C6C_15 Datasheet, PDF (70/100 Pages) Renesas Technology Corp – RENESAS MCU

M16C/6C Group
Memory Expansion Mode and Microprocessor Mode
(Effective in wait state setting)
BCLK
RD
(Separate bus)
WR
(Separate bus)
RD
(Multiplexed bus)
WR
(Multiplexed bus)
RDY input
tsu(RDY-BCLK)
Measuring conditions
y VCC1 = VCC2 = 5 V
y Input timing voltage: VIL = 1.0 V, VIH = 4.0 V
y Output timing voltage: VOL = 2.5 V, VOH = 2.5 V
Figure 5.16 Timing Diagram
5. Electrical Characteristics
V_CC1 = V_CC2 = 5 V
th(BCLK-RDY)
R01DS0034EJ0210 Rev.2.10
Jul 31, 2012
Page 70 of 96