PD46184182B_15 Datasheet, PDF (7/34 Pages) Renesas Technology Corp – 18M-BIT DDR II SRAM 2-WORD BURST OPERATION

μPD46184182B, μPD46184362B
Block Diagram
CLK
Burst
Logic
A0
D0 Q0
A0'
Address
LD#
K
K#
R, W#`
R
Address
Register
W#
E
Compare
C# C
Write address
Register
E
A0'
A0'' Output control A0'''
Logic
Input
E Register
/A0'
A0'
CLK
/A0'
A0'
Memory
K
Array
0
2 :1
MUX
1
ZQ
Output Buffer
Input
E Register
0
1
A0'''
E
DQ
R, W#
Register
E
Output Enable
Register
C
R10DS0114EJ0200 Rev.2.00
Nov 09, 2012
Page 7 of 34