HD404358 Datasheet, PDF (69/102 Pages) Renesas Technology Corp – microcomputer has an A/D converter,

HD404358 Series
If more than eight transmit clocks are input in transfer state, at the eighth clock including a spurious pulse
by noise, the octal counter reaches 000, the serial interrupt request flag (IFS: $003, bit 2) is set, and
transmit clock wait state is entered. At the falling edge of the next normal clock signal, the transfer state is
entered. After the transfer completion processing is performed and IFS is reset, writing to the serial mode
register (SMR: $005) changes the state from transfer to STS wait. At this time IFS is set again, and
therefore the error can be detected.
Notes on Use:
• Initialization after writing to registers: If port mode register A (PMRA: $004) is written to in transmit
clock wait state or in transfer state, the serial interface must be initialized by writing to the serial mode
register (SMR: $005) again.
• Serial interrupt request flag (IFS: $003, bit 2) set: If the state is changed from transfer to another by
writing to the serial mode register (SMR: $005) or executing the STS instruction during the first low
pulse of the transmit clock, the serial interrupt request flag is not set. To set the serial interrupt request
flag, serial mode register write or STS instruction execution must be programmed to be executed after
confirming that the SCK pin is at 1, that is, after executing the input instruction to port R0.
Registers for Serial Interface
The serial interface operation is selected, and serial data is read and written by the following registers.
Serial Mode Register (SMR: $005)
Serial Data Register (SRL: $006, SRU: $007)
Port Mode Register A (PMRA: $004)
Port Mode Register C (PMRC: $025)
Miscellaneous Register (MIS: $00C)
Serial Mode Register (SMR: $005): This register has the following functions (figure 55).
• R0₀/SCK pin function selection
• Transmit clock selection
• Prescaler division ratio selection
• Serial interface initialization
Serial mode register (SMR: $005) is a 4-bit write-only register. It is reset to $0 by MCU reset.
A write signal input to serial mode register (SMR: $005) discontinues the input of the transmit clock to the
serial data register and octal counter, and the octal counter is reset to 000. Therefore, if a write is performed
during data transfer, the serial interrupt request flag (IFS: $003, bit 2) is set.
Written data is valid from the second instruction execution cycle after the write operation, so the STS
instruction must be executed at least two cycles after that.
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