HD404358 Datasheet, PDF (57/102 Pages) Renesas Technology Corp – microcomputer has an A/D converter,

HD404358 Series
T × (N + 1)
Notes:
TMC3 = 0
(free-running
timer)
TMC3 = 1
(reload timer)
T × 256
T
T × (256 – N)
T: Input clock period supplied to counter. (The clock source and system clock division
ratio are determined by timer mode register C.)
N: Value of timer write register C. (When N = 255 ($FF), PWM output is fixed low.)
Figure 42 PWM Output Waveform
Notes on Use
When using the timer output as PWM output, note the following point. From the update of the timer write
register until the occurrence of the overflow interrupt, the PWM output differs from the period and duty
settings, as shown in table 26. The PWM output should therefore not be used until after the overflow
interrupt following the update of the timer write register. After the overflow, the PWM output will have the
set period and duty cycle.
In this case, the lower digit (TWCL) must be written to first, bit writing only to the lower digit does not
change the timer C value. Timer C is changed to the value in timer write register B at the same time the
upper digit (TWCU) is written to.
Table 26 PWM Output Following Update of Timer Write Register
PWM Output
Timer Write Register is Updated
Mode during High PWM Output
Reload
Timer write
register
updated to
value N
Interrupt
request
Timer Write Register is Updated
during Low PWM Output
Timer write
register
updated to
value N
Interrupt
request
T
T × (255 – N)
T
T
T × (255 – N)
T
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