HD404358 Datasheet, PDF (38/102 Pages) Renesas Technology Corp – microcomputer has an A/D converter,

HD404358 Series
Evaluation Chip Set and ZTAT™/Mask ROM Product Differences
As shown in figure 20, the NMOS intermediate breakdown voltage open drain pin circuit in the evaluation
chip set differs from that used in the ZTAT™ microcomputer and built-in mask ROM microcomputer
products.
Please note that although these outputs in the ZTAT™ microcomputer and built-in mask ROM
microcomputer products can be set to high impedance by the combinations shown in table 23, these outputs
cannot be set to high impedance in the evaluation chip set.
Table 23 Program Control of High Impedance States
Register
Set Value
DCR
0
1
PDR
*
1
Notes: * An asterisk indicates that the value may be either 0 or 1 and has no influence on circuit operation.
This applies to the ZTAT™ and built-in mask ROM microcomputer NMOS open drain pins.
V_CC
V_CC
HLT
MIS3
DCR
Input control signal
Evaluation Chip Set Circuit Structure
HLT
DCR
PDR
PDR
CPU input
Input control signal
CPU input
ZTAT™ and Built-in Mask ROM Microcomputer Circuit Structure
Figure 20 NMOS Intermediate Breakdown Voltage Open Drain Pin Circuits
36