H8S2189R Datasheet, PDF (639/812 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family / H8S/2100 Series

Section 18 Flash Memory (0.18-µm F-ZTAT Version)
(3) Programming
There is an entry point for the programming program in the area from the start address of a
download destination specified by FTDAR + 16 bytes. The subroutine is called and programming
is executed by using the following steps.
MOV.L
JSR
NOP
#DLTOP+16,ER2
@ER2
; Set entry address to ER2
; Call programming routine
• The general registers other than R0L are saved in the programming program.
• R0L is a return value of the FPFR parameter.
• Since the stack area is used in the programming program, a 128-byte stack area at the
maximum must be allocated in RAM.
(a) The return value in the programming program, FPFR (general register R0L) is
determined.
(b) Determine whether programming of the necessary data has finished.
If more than 128 bytes of data are to be programmed, specify FMPAR and FMPDR in 128-byte
units, and repeat steps (l) to (n). Increment the programming destination address by 128 bytes and
update the programming data pointer correctly. If an address that has already been programmed is
written to again, not only will a programming error occur, but also flash memory will be damaged.
(c) After programming finishes, clear FKEY and specify software protection.
If this LSI is restarted by a reset immediately after user MAT programming has finished, secure a
reset period (period of RES = 0) of 100 µs which is longer than normal.
(4) Erasing Procedure in User Program Mode
The procedures for download, initialization, and erasing are shown in figure 18.12.
Rev. 2.00 Aug. 03, 2005 Page 597 of 766
REJ09B0223-0200