H8S2189R Datasheet, PDF (443/812 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family / H8S/2100 Series

Section 14 Serial Communication Interface (SCI, IrDA)
Bit Bit Name Initial Value R/W Description
1
MPB
0
R
Multiprocessor Bit
MPB stores the multiprocessor bit in the receive
frame. When the RE bit in SCR is cleared to 0 its
previous state is retained.
0
MPBT
0
R/W Multiprocessor Bit Transfer
MPBT stores the multiprocessor bit to be added
to the transmit frame.
Note: * Only 0 can be written to clear the flag.
• Bit Functions in Smart Card Interface Mode (when SMIF in SCMR = 1)
Bit Bit Name Initial Value R/W Description
7
TDRE
1
R/(W)* Transmit Data Register Empty
Indicates whether TDR contains transmit data.
[Setting conditions]
• When the TE bit in SCR is 0
• When data is transferred from TDR to TSR,
and TDR can be written to.
[Clearing conditions]
6
RDRF
0
R/(W)*¹
• When 0 is written to TDRE after reading
TDRE = 1
Receive Data Register Full
Indicates that receive data is stored in RDR.
[Setting condition]
• When serial reception ends normally and
receive data is transferred from RSR to RDR
[Clearing conditions]
• When 0 is written to RDRF after reading
RDRF = 1
The RDRF flag is not affected and retains its
previous value when the RE bit in SCR is cleared
to 0.
Rev. 2.00 Aug. 03, 2005 Page 401 of 766
REJ09B0223-0200