H8S2125 Datasheet, PDF (60/700 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcomputer H8S Family / H8S/2100 Series

Section 2 CPU
2.2.2 Advanced Mode
• Address space
Linear access to a maximum address space of 16 Mbytes is possible.
• Extended registers (En)
The extended registers (E0 to E7) can be used as 16-bit registers. They can also be used as the
upper 16-bit segments of 32-bit registers or address registers.
• Instruction set
All instructions and addressing modes can be used.
• Exception vector table and memory indirect branch addresses
In advanced mode, the top area starting at H'00000000 is allocated to the exception vector
table in 32-bit units. In each 32 bits, the upper eight bits are ignored and a branch address is
stored in the lower 24 bits (see figure 2.3). For details of the exception vector table, see section
4, Exception Handling.
H'00000000
H'00000003
H'00000004
H'00000007
H'00000008
Reserved
Reset exception vector
Reserved
(Reserved for system use)
H'0000000B
H'0000000C
(Reserved for system use)
Exception vector table
H'00000010
Reserved
Exception vector 1
Figure 2.3 Exception Vector Table (Advanced Mode)
Rev. 1.00 Sep. 21, 2006 Page 22 of 658
REJ09B0310-0100