H8S2125 Datasheet, PDF (163/700 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcomputer H8S Family / H8S/2100 Series

Section 7 Data Transfer Controller (DTC)
Section 7 Data Transfer Controller (DTC)
This LSI includes a data transfer controller (DTC). The DTC can be activated by an interrupt or
software, to transfer data.
Figure 7.1 shows a block diagram of the DTC. The DTC's register information is stored in the on-
chip RAM. When the DTC is used, the RAME bit in SYSCR must be set to 1. A 32-bit bus
connects the DTC to addresses H'(FF)EC00 to H'(FF)EFFF in on-chip RAM (1 Kbyte), enabling
32-bit/1-state reading and writing of the DTC register information.
DTCH80CA_000020020300
Rev. 1.00 Sep. 21, 2006 Page 125 of 658
REJ09B0310-0100