H8S2125 Datasheet, PDF (404/700 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcomputer H8S Family / H8S/2100 Series

Section 16 I²C Bus Interface (IIC)
• Direct bus drive (SCL/SDA pin)
 Two pins—P52/SCL0 and P47/SDA0—(normally NMOS push-pull outputs) function as
NMOS open-drain outputs when the bus drive function is selected.
 Two pins—P24/SCL1 and P23/SDA1—(normally CMOS pins) function as NMOS outputs
when the bus drive function is selected. Voltage exceeding Vcc cannot be applied.
Figure 16.1 shows a block diagram of the I²C bus interface. Figure 16.2 shows an example of I/O
pin connections to external circuits. Since I²C bus interface I/O pins are different in structure from
normal port pins, they have different specifications for permissible applied voltages. For details,
see section 24, Electrical Characteristics.
ICXR
φ
PS
SCL
Noise
canceler
SDA
Noise
canceler
Clock
control
Bus state
decision
circuit
Arbitration
decision
circuit
Output data
control
circuit
ICCR
ICMR
ICSR
ICDRT
ICDRS
ICDRR
Address
comparator
[Legend]
ICCR: I²C bus control register
ICMR: I²C bus mode register
ICSR: I²C bus status register
ICDR: I²C bus data register
ICXR: I²C bus extended control register
SAR: Slave address register
SARX: Slave address register X
PS: Prescaler
SAR, SARX
Interrupt
generator
Figure 16.1 Block Diagram of I²C Bus Interface
Rev. 1.00 Sep. 21, 2006 Page 366 of 658
REJ09B0310-0100
Interrupt
request