M16C30L Datasheet, PDF (59/166 Pages) Renesas Technology Corp – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

Interrupt
Mitsubishi microcomputers
M16C / 30L Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Priority level of each interrupt
INT1
Timer B2
Timer A1
Level 0 (initial value)
INT2
INT0
Timer B1
Timer A2
UART1 reception
UART0 reception
UART2 reception/ACK
A-D conversion
Bus collision detection
Timer A0
UART1 transmission
UART0 transmission
UART2 transmission/NACK
Key input interrupt
DMA0
Processor interrupt priority level (IPL)
Interrupt enable flag (I flag)
Address match
Watchdog timer
DBC
NMI
Reset
High
Priority of peripheral I/O interrupts
(if priority levels are same)
Low
Interrupt request level judgment output
to clock generating circuit (Fig.1.10.3)
Interrupt
request
accepted
Figure 1.11.9. Maskable interrupts priorities (peripheral I/O interrupts)
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