HD404344R Datasheet, PDF (53/102 Pages) Renesas Technology Corp – 4-bit microcomputer has an A/D converter

HD404344R Series/HD404394 Series
The timer B interrupt request flag is set by an overflow. Resetting the timer B interrupt request flag
(IFTB: $002, bit 0) is executed by either software or by an MCU reset.
• External event counter operation: By setting the external event input as an input clock source, timer B
can operate as an external event counter. The D₀/INT₀/EVNB pins are set to be INT₀/EVNB pins by
port mode register B (PMRB: $024).
The detection edge of the external event counter for timer B is selected as rising edge, falling edge, or
rising/falling edge by timer mode register B2 (TMB2: $026). When the rising/falling edge is selected,
the period must be set to more than 2t_cyc between the falling edge and the rising edge.
Timer B is incremented by 1 using the edge selection in timer mode register B2 (TMB2: $026). Other
functions are based on the free-running/reload timer.
Interrupt request
flag of timer B
(IFTB)
EVNB
Edge
detector
System
clock
ø_PER
2
Timer read
register BU
(TRBU)
Timer read
register B lower
(TRBL)
Clock
Free-running
timer control
Timer counter B
(TCB)
Timer write
register B upper
(TWBU)
Overflow
Selector
Timer write
register B lower
(TWBL)
3
Prescaler S (PSS)
Edge detection control
Timer mode
register B1
(TMB1)
Timer mode
register B2
(TMB2)
Figure 26 Timer B Free-Running and Reload Operation Block Diagram
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