7751 Datasheet, PDF (323/540 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER

ELECTRICAL CHARACTERISTICS
15.7 Single-chip mode
15.7 Single-chip mode
Timing requirements (VCC = 5 V±10%, VSS = 0 V, Ta = –20 to 85 °C, unless otherwise noted)
Symbol
Parameter
tc
tw(H)
tw(L)
tr
tf
tsu(P0D–E)
tsu(P1D–E)
tsu(P2D–E)
tsu(P3D–E)
tsu(P4D–E)
tsu(P5D–E)
tsu(P6D–E)
tsu(P7D–E)
tsu(P8D–E)
th(E–P0D)
th(E–P1D)
th(E–P2D)
th(E–P3D)
th(E–P4D)
th(E–P5D)
th(E–P6D)
th(E–P7D)
th(E–P8D)
External clock input cycle time
External clock input high-level pulse width
External clock input low-level pulse width
External clock rise time
External clock fall time
Port P0 input setup time
Port P1 input setup time
Port P2 input setup time
Port P3 input setup time
Port P4 input setup time
Port P5 input setup time
Port P6 input setup time
Port P7 input setup time
Port P8 input setup time
Port P0 input hold time
Port P1 input hold time
Port P2 input hold time
Port P3 input hold time
Port P4 input hold time
Port P5 input hold time
Port P6 input hold time
Port P7 input hold time
Port P8 input hold time
Limits
Min. Max.
Unit
25
ns
tc/2–8
ns
tc/2–8
ns
8 ns
8 ns
60
ns
60
ns
60
ns
60
ns
60
ns
60
ns
60
ns
60
ns
60
ns
0
ns
0
ns
0
ns
0
ns
0
ns
0
ns
0
ns
0
ns
0
ns
Switching characteristics (VCC = 5 V±10%, VSS = 0 V, Ta = –20 to 85 °C, unless otherwise noted)
Symbol
td(E–P0Q)
td(E–P1Q)
td(E–P2Q)
td(E–P3Q)
td(E–P4Q)
td(E–P5Q)
td(E–P6Q)
td(E–P7Q)
td(E–P8Q)
Port P0 data output delay time
Port P1 data output delay time
Port P2 data output delay time
Port P3 data output delay time
Port P4 data output delay time
Port P5 data output delay time
Port P6 data output delay time
Port P7 data output delay time
Port P8 data output delay time
Parameter
Limits
Min. Max. ^Unit
60 ^ns
60 ^ns
60 ^ns
60 ^ns
60 ^ns
60 ^ns
60 ^ns
60 ^ns
60 ^ns
Note: For test conditions, refer to Figure 15.15.1.
15–16
7751 Group User’s Manual