7751 Datasheet, PDF (219/540 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER

A-D CONVERTER
8.3 A-D conversion method (successive approximation conversion method)
8.3 A-D conversion method (successive approximation conversion method)
The A-D converter compares the comparison voltage (Vref), which is internally generated according to the
contents of the successive approximation register, with the analog input voltage (VIN), which is input from
the analog input pin (ANi). By reflecting the comparison result on the successive approximation register, VIN
is converted into a digital value. When a trigger is generated, the A-D converter performs the following
processing:
ΠDetermining bit 9 of the successive approximation register
The A-D converter compares Vref with VIN. At this point, the contents of the successive approximation
register are “10000000002” (initial value).
Bit 9 of the successive approximation register changes according to the comparison result as follows:
When Vref < VIN, bit 9 = “1”
When Vref > VIN, bit 9 = “0”
 Determining bit 8 of the successive approximation register
After setting bit 8 of the successive approximation register to “1,” the A-D converter compares Vref
with VIN. Bit 8 changes according to the comparison result as follows:
When Vref < VIN, bit 8 = “1”
When Vref > VIN, bit 8 = “0”
Ž Determining bits 7 to 0 of the successive approximation register
Operation in  are performed for bits 7 to 0 in the 10-bit mode.
Operation in  are performed for bits 7 to 2 in the 8-bit mode.
When the LSB is determined, the contents (conversion result) of the successive approximation register
are transferred to the A-D register i.
The comparison voltage (Vref) is generated according to the latest contents of the successive approximation
register. Table 8.3.1 lists the relationship between the successive approximation register’s contents and Vref.
Table 8.3.2 and Table 8.3.3 list changes of the successive approximation register and Vref during the A-D
conversion. Figure 8.3.1 shows the ideal A-D conversion characteristics in the 10-bit mode.
Table 8.3.1 Relationship between successive approximation register’s contents and Vref
Successive approximation register’s contents: n
Vref (V)
0
0
1 to 1023
VREF^V
1024
! (n – 0.5)
VREF^V: Reference voltage
8–10
7751 Group User’s Manual