H8S-2214 Datasheet, PDF (261/936 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family H8S-2100 Series

Section 7 DMA Controller
Bit 5—Data Transfer Master Enable 0 (DTME0): Enables or disables data transfer on channel
0.
Bit 5
DTME0
0
1
Description
Data transfer disabled. In normal mode, cleared to 0 by an NMI interrupt (Initial value)
Data transfer enabled
Bits 6 and 4—Data Transfer Enable (DTE): When DTE = 0, data transfer is disabled and the
activation source selected by the data transfer factor setting is ignored. If the activation source is
an internal interrupt, an interrupt request is issued to the CPU or DTC. If the DTIE bit is set to 1
when DTE = 0, the DMAC regards this as indicating the end of a transfer, and issues a transfer
end interrupt request to the CPU.
The conditions for the DTE bit being cleared to 0 are as follows:
• When initialization is performed
• When the specified number of transfers have been completed
• When 0 is written to the DTE bit to forcibly abort the transfer, or for a similar reason
When DTE = 1 and DTME = 1, data transfer is enabled and the DMAC waits for a request by the
activation source selected by the data transfer factor setting. When a request is issued by the
activation source, DMA transfer is executed.
The condition for the DTE bit being set to 1 is as follows:
• When 1 is written to the DTE bit after the DTE bit is read as 0
Bit 6—Data Transfer Enable 1 (DTE1): Enables or disables data transfer on channel 1.
Bit 6
DTE1
0
1
Description
Data transfer disabled
Data transfer enabled
(Initial value)
Rev.4.00 Sep. 18, 2008 Page 201 of 872
REJ09B0189-0400