H8SX1663 Datasheet, PDF (253/1158 Pages) Renesas Technology Corp – Renesas 32-Bit CISC Microcomputer H8SX Family / H8SX/1600 Series

Section 6 Bus Controller (BSC)
6.6.5 Read Strobe (RD) Timing
The read strobe timing can be modified in area units by setting bits RDN7 to RDN0 in RDNCR to
1.
Note that the RD timing with respect to the DACK rising edge will change if the read strobe
timing is modified by setting RDNn to 1 when the DMAC is used in the single address mode.
Figure 6.22 shows an example of timing when the read strobe timing is changed in the basic bus 3-
state access space.
Bus cycle
T₁
T₂
T₃
Bφ
Address bus
CSn
AS
RD
RDNn = 0
Data bus
RD
RDNn = 1
Data bus
BS
RD/WR
DACK
Notes: 1. n = 0 to 7
2. When DKC = 0
Figure 6.22 Example of Read Strobe Timing
Rev.1.00 Jun. 07, 2006 Page 201 of 1102
REJ09B0294-0100