TLC5944 Datasheet, PDF (21/34 Pages) Texas Instruments – 16-Channel, 12-Bit PWM LED Driver with 6-Bit Dot Correction and Pre-Charge FET

TLC5944
www.ti.com ...................................................................................................................................................................................................... SBVS112 – JUNE 2008
Status Information Data (SID)
Status information data (SID) are 18-bit, read-only data. The 16-bit LED open detection (LOD) error, the thermal
error flag (TEF), and the pre-thermal warning (PTW) are shifted out onto the SOUT pin with each rising edge of
the serial data shift clock, SCLK. The 16 LOD bits for each channel and the two TEF bits are written into the 18
most significant bits of the grayscale shift register at the rising edge of the first SCLK after XLAT goes low. As a
result, the previous data in the 18 most significant bits of the grayscale information are lost at the same time. No
data are loaded into the other 174 bits. Figure 30 shows the bit assignments. Figure 16 illustrates the read timing
for the status information data.
Status Information Data (SID) Configuration
LOD Data of OUT15 to OUT0 (16 Bits)
MSB
17
16
¼
2
1
OUT15
LOD Data
OUT14
LOD Data
¼
OUT0
LOD Data
TEF Data
LSB
0
PTW Data
SOUT
(DCSEL = L)
¼
The 16 LOD bits for each channel and the TEF and PTW bits
overwrite the most significant 18 bits of the grayscale shift register
at the rising edge of the first SCLK after XLAT goes low.
GS Data for OUT15
¼ GS Data for OUT14 GS Data for OUT1
GS Data for OUT0
MSB
LSB
191
180
179
175
174
12
11
0
OUT15-Bit11
OUT15-Bit0 OUT14-Bit11
OUT14-Bit7 OUT14-Bit6
¼
¼
(LOD-OUT15)
(LOD-OUT4) (LOD-OUT3)
(TEF)
(PTW)
¼ ¼ _{OUT1-Bit0 OUT0-Bit11}
OUT0-Bit0
SIN
SCLK
(DCSEL = L)
Grayscale Shift Register (12 Bits 16 Channels)
´
Figure 30. Status Information Data Configuration
The LOD data update at the rising edge of the next 33rd GSCLK of the subsequent PWM cycle; the LOD data
are retained until the next 33rd GSCLK. LOD data are only checked for outputs that are turned on during the
rising edge of the 33rd GSCLK pulse. A '1' in an LOD bit indicates an open LED condition for the corresponding
channel. A '0' indicates normal operation. It is possible for LOD data to show a '0' even if the LED is open when
the grayscale data are less than 20h (32d).
The PTW and TEF bits indicate that the IC temperature is high and too high, respectively. The TEF flag also
indicates that the IC has turned off all drivers to avoid damage by overheating the device. A '1' in the TEF bit
means that the IC temperature has exceeded the detect temperature threshold of high side (T_(TEF)) and the driver
is forced off. A '0' in the TEF bit indicates the driver has not exceeded the high temperature. The PTW flag
indicates that the IC temperature has exceeded the detect temperature threshold, but does not force the driver
off. A '1' in the PTW bit indicates that the IC temperature has exceeded the pre-thermal warning threshold
(T_(PTW)) but does not force the driver off. A '0' in the PTW bit indicates normal operation with low-side
temperature conditions. When the PTW is set, the IC temperature should be reduced by lowering the power
dissipated in the driver to avoid a forced shutdown by the thermal shutdown circuit. This reduction can be
accomplished by lowering the values of the GS or DC data.
When the IC powers on, LOD data do not show correct values. Therefore, LOD data must be read from the 33rd
GSCLK pulse input after BLANK goes low. Table 4 shows a truth table for both LOD and TEF.
SID DATA
0
1
Table 4. LOD and TEF Truth Table
LED OPEN DETECTION (LODn)
LED is connected
(V_OUTn > V_LOD)
LED is open or shorted to GND
(V_OUTn ≤ V_LOD)
CONDITION
THERMAL ERROR FLAG (TEF)
Device temperature is lower than the
high-side detect temperature
(temp ≤ T_(TEF) –T_(HYST))
Device temperature is higher than the
high-side detect temperature and the
driver is forced off
(temp > T_(TEF))
PRE-THERMAL WARNING (PTW)
Device temperature is lower than the
low-side detect temperature
(temp < T_(PTW) – T_(HYSP))
Device temperature is higher than the
low-side detect temperature
(temp ≥ T_(PTW))
Copyright © 2008, Texas Instruments Incorporated
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