TLC5944 Datasheet, PDF (20/34 Pages) Texas Instruments – 16-Channel, 12-Bit PWM LED Driver with 6-Bit Dot Correction and Pre-Charge FET

TLC5944
SBVS112 – JUNE 2008 ...................................................................................................................................................................................................... www.ti.com
Dot Correction (DC) Shift Register and Data Latch
The dot correction (DC) shift register and latches are each 96 bits long and are used to individually adjust the
constant current value for each constant current driver. Each channel can be adjusted from 0% to 100% of the
maximum LED current with 6-bit resolution. Table 2 describes the percentage of maximum current for each dot
correction data. Figure 29 shows the shift register and latch configuration for DC data. Figure 15 illustrates the
timing for writing data into the DC shift registers and latches. Each LED channel current is dot-corrected by the
percentage value that corresponds to the data in the respective DC data latch. DC data present on the SIN pin
are clocked, MSB first, into the DC shift register at each rising edge of the SCLK pin when DCSEL is high. Data
are latched from the shift register into the DC data latch with a rising edge on the XLAT pin when DCSEL is high.
A DCSEL level change is allowed when SCLK is low and 100 ns after the rising edge of XLAT.
When the IC is powered on, the data in the DC shift register and data latch are not set to any default value.
Therefore, dot correction data must be written to the DC latch before turning on the constant current output.
SOUT
(DCSEL = H)
Dot Correction Shift Register (6 Bits 16 Channels)
´
DC Data for OUT15
MSB
95
90
¼ DC Data for OUT14 DC Data for OUT1
89
6
DC Data for OUT0
LSB
5
0
¼ _OUT15-Bit5
OUT15-Bit0 OUT14-Bit5
¼
¼ _{OUT1-Bit0 OUT0-Bit5}
OUT0-Bit0
SIN
SCLK
(DCSEL = H)
¼
¼
¼
DC Data for OUT15
MSB
95
90
¼ DC Data for OUT14 DC Data for OUT1
89
6
DC Data for OUT0
LSB
5
0
¼ _OUT15-Bit5
OUT15-Bit0 OUT14-Bit5
¼
¼ _{OUT1-Bit0 OUT0-Bit5}
OUT0-Bit0
XLAT
(DCSEL = H)
Dot Correction Data Latch (6 Bits 16 Channels)
´
96 Bits
To Constant Current Driver Block
Figure 29. Dot Correction Shift Register and Latch Configuration
20
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