H8S-2626 Datasheet, PDF (201/1069 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcomputer

Section 7 Bus Controller
7.7 Write Data Buffer Function
The H8S/2626 Group and H8S/2623 Group have a write data buffer function in the external data
bus. Using the write data buffer function enables external writes to be executed in parallel with
internal accesses. The write data buffer function is made available by setting the WDBE bit in
BCRL to 1.
Figure 7.17 shows an example of the timing when the write data buffer function is used. When this
function is used, if an external write continues for 2 states or longer, and there is an internal access
next, only an external write is executed in the first state, but from the next state onward an internal
access (on-chip memory or internal I/O register read/write) is executed in parallel with the external
write rather than waiting until it ends.
On-chip memory read Internal I/O register read
External write cycle
T₁
T₂
T_W
T_W
T₃
Internal address bus
Internal read signal
Internal memory Internal I/O register address
A23 to A0
External
space
write
HWR, LWR
D15 to D0
External address
Figure 7.17 Example of Timing when Write Data Buffer Function is Used
Rev. 5.00 Jan 10, 2006 page 177 of 1042
REJ09B0275-0500