M16C62 Datasheet, PDF (200/231 Pages) Renesas Technology Corp – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

CPU Rewrite Mode
Mitsubishi microcomputers
M16C / 62 Group (80-pin)
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Software Commands
Table 1.22.1 lists the software commands available with the M16C/62 (flash memory version).
After setting the CPU rewrite mode select bit to 1, write a software command to specify an erase or
program operation. Note that when entering a software command, the upper byte (D8 to D15) is ignored.
The content of each software command is explained below.
Command
Read array
Read status register
Clear status register
Page program (Note 3)
Block erase
Erase all unlock block
Lock bit program
Read lock bit status
First bus cycle
Data
Mode Address _{(D0 to D7)}
Second bus cycle
Data
Mode Address _{(D0 to D7)}
Third bus cycle
Data
Mode Address _{(D0 to D7)}
Write X (Note 6) FF16
Write
X
7016
Read
X
SRD ^{(Note 2)}
Write
X
5016
Write
X
4116
Write WA0^{(Note 3)} WD0 ^{(Note 3)} Write WA1
WD1
Write
X
2016
Write BA ^{(Note 4)} D016
Write
X
A716 Write
X
D016
Write
X
7716 Write
BA
D016
Write
X
7116
Read
BA
D6 ^{(Note 5)}
Note 1: When a software command is input, the high-order byte of data (D8 to D15) is ignored.
Note 2: SRD = Status Register Data
Note 3: WA = Write Address, WD = Write Data
WA and WD must be set sequentially from 0016 to FE16 (byte address; however, an even address). The page size is
256 bytes.
Note 4: BA = Block Address (Enter the maximum address of each block that is an even address.)
Note 5: D6 corresponds to the block lock status. Block not locked when D6 = 1, block locked when D6 = 0.
Note 6: X denotes a given address in the user ROM area (that is an even address).
Table 1.22.1. List of Software Commands (CPU Rewrite Mode)
Read Array Command (FF16)
The read array mode is entered by writing the command code “FF16” in the first bus cycle. When an
even address to be read is input in one of the bus cycles that follow, the content of the specified
address is read out at the data bus (D0–D15), 16 bits at a time.
The read array mode is retained intact until another command is written.
Read Status Register Command (7016)
When the command code “7016” is written in the first bus cycle, the content of the status register is
read out at the data bus (D0–D7) by a read in the second bus cycle.
The status register is explained in the next section.
Clear Status Register Command (5016)
This command is used to clear the bits SR3 to 5 of the status register after they have been set. These
bits indicate that operation has ended in an error. To use this command, write the command code
“5016” in the first bus cycle.
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