HD49351BP Datasheet, PDF (20/29 Pages) Renesas Technology Corp – CDS/PGA & 10-bit A/D TG Converter

HD49351BP/HBP
• Gray code (D8 to D12 of address H’F4)
ADC output code can be change to following type by differential code gray SW (D9, D8).
Binary code at D8: 0, Gray code at D8: 1
Normal at D9: 0, differential code at D9: 1
Differential code and gray code are recommended for this countermeasure. Figure 10 indicates circuit block. When
luminance signal changes are smoothly, the number of bit of switching digital output bit can be reduced and easily
to reduce the ripple using this function. This function is especially effective for longer the settings of sensor more
than clk = 30 MHz, and ADC output.
Figure 12 indicates the timing specifications.
Standard
Standard
Standard Data Output timing at •
Phase (D10) Phase (D11) Selecting the Differential Code
0
0
Third and fourth
1
0
Fourth and fifth
0
1
Fifth and sixth
1
1
Sixth and seventh
Note: Color filter is different1 in the number of pixels with odd number
and even number therefore first 2 pixcels should be standard.
adck phase (D12): ADCK polar to OBP
When 0: Select positive edge
When 1: Select negative edge
10 ^{Differential SW(D9)}
ADC
2clk_DL
Standard data
control signal
(D10, D11)
+
−
Carry bit
rounding
Gray SW(D8)
10
Standard
data
selector
Convert
Gray→Binary
Figure 10 Differential Code and Gray Code Circuit
Output
ADCLK
(In case of select the positive edge of ADCLK with D12)
OBP (In case of select the positive polar)
(Beginning edge of OBP and standard edge of ADCLK should be exept ±5 ns)
Digital output
12345678
Differential data
Standard
data
Differential data
Figure 11 Timing Specification of Differential Code
From ADC
Convert
Gray→Binary
Standard data
control signal
Carry bit
rounding
Standard
data
selector
2clk
delay
(1) Complex differential coded
D11
D11
D10
D10
D9
D9
D0
D0
(2) Convert Gray → Binary
Figure 12 Complex Circuit Example at the DSP Side
Rev.1.0, Jul 06, 2004, page 20 of 28