R8C-20_1 Datasheet, PDF (151/501 Pages) Renesas Technology Corp – MCU R8C FAMILY / R8C/2x SERIES

R8C/20 Group, R8C/21 Group
14. Timers
Underflow signal of timer
RA prescaler
TSTART bit in ¹
TRACR register ₀
Measurement pulse ¹
(TRAIO pin input) 0
Set to 1 by program
Starts counting
TRA reloads
TRA reloads
Contents of TRA
0Fh 0Eh 0Dh 0Fh 0Eh 0Dh 0Ch 0Bh 0Ah 09h 0Fh 0Eh 0Dh
01h 00h 0Fh 0Eh
Contents of read-out
buffer⁽¹⁾
TEDGF bit in ¹
TRACR register ₀
TUNDF bit in ¹
TRACR register ₀
0Fh 0Eh
Retained
0Dh
Retained
0Bh 0Ah
09h
0Dh
TRA read⁽³⁾
(2)
(2)
01h 00h 0Fh 0Eh
Set to 0 by program
(4)
(6)
Set to 0 by program
(5)
IR bit in TRAIC ¹
register ₀
Set to 0 when interrupt request is acknowledged, or set by program
Conditions: A period from one rising edge to the next rising edge of measurement pulse is measured (TEDGSEL = 0) with
the default value of the TRA register as 0Fh.
NOTES:
1. The contents of the read-out buffer can be read when the TRA register is read in pulse period measurement mode.
2. After an active edge of measurement pulse is input, the TEDGF bit in the TRACR register is set to 1 (active edge found) when the timer RA
prescaler underflows for the second time.
3. The TRA register should be read before the next active edge is input after the TEDGF bit is set to 1 (active edge found).
The content in the read-out buffer is retained until the TRA register is read. If the TRA register is not read before the next active edge is
input, the measured result of the previous period is retained.
4. When set to 0 by a program, use a MOV instruction to write 0 to the TEDGF bit in the TRACR register. At the same time, write 1 to the
TUNDF bit in the TRACR register.
5. When set to 0 by a program, use a MOV instruction to write 0 to the TUNDF bit. At the same time, write 1 to the TEDGF bit.
6. The TUNDF and TEDGF bits are both set to 1 if the timer RA underflows and reloads on an active edge simultaneously.
Figure 14.12 Operating Example of Pulse Period Measurement Mode
Rev.2.00 Aug 27, 2008 Page 135 of 458
REJ09B0250-0200