M37221M4H_15 Datasheet, PDF (14/114 Pages) Renesas Technology Corp – SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER

M37221M4H/M6H/M8H/MAH–XXXSP/FP M37221EASP/FP
8. FUNCTION BLOCK DESCRIPTION
8.1 CENTRAL PROCESSING UNIT (CPU)
This microcomputer uses the standard 740 Family instruction set.
Refer to the table of 740 Family addressing modes and machine
instructions or the SERIES 740 <Software> User’s Manual for de-
tails on the instruction set.
Availability of 740 Family instructions is as follows:
The FST and SLW instructions cannot be used.
The MUL, DIV, WIT and STP instructions can be used.
8.1.1 CPU Mode Register
The CPU mode register includes a stack page selection bit and inter-
nal system clock selection bit. The CPU mode register is allocated to
address 00FB16.
CPU Mode Register
b7 b6 b5 b4 b3 b2 b1 b0
1 1 1 1 1 0 0 _{CPU mode register (CM) [Address 00FB16]}
B
Name
0, 1 Fix these bits to “0.”
Functions
2 ^{Stack page selection 0: 0 page}
bit (CM2) (See note) 1: 1 page
3 to 7 Fix these bits to “1.”
After reset R W
Indeterminate R W
1 RW
Indeterminate R W
Note: This bit is set to “1” after the reset release.
Fig. 8.1.1 CPU Mode Register
Rev.1.00 Oct 01, 2002 page 12 of 110
REJ03B0134-0100Z