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HYB18T512400B Datasheet, PDF (41/68 Pages) Qimonda AG – 512-Mbit Double-Data-Rate-Two SDRAM | |||
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Internet Data Sheet
HYB18T512[40/80/16]0B[C/F]
512-Mbit Double-Data-Rate-Two SDRAM
Speed Grade
TABLE 44
Speed Grade Definition Speed Bins for DDR2â667
DDR2â667C
DDR2â667D
Unit
Note
QAG Sort Name
â3
â3S
CAS-RCD-RP latencies
4â4â4
5â5â5
tCK
Parameter
Symbol
Min.
Max.
Min.
Max.
â
Clock Frequency
@ CL = 3
tCK
5
8
5
8
ns
1)2)3)4)
@ CL = 4
tCK
3
8
3.75
8
ns
1)2)3)4)
@ CL = 5
tCK
3
8
3
8
ns
1)2)3)4)
Row Active Time
tRAS
45
70000 45
70000 ns
1)2)3)4)5)
Row Cycle Time
tRC
57
â
60
â
ns
1)2)3)4)
RAS-CAS-Delay
tRCD
12
â
15
â
ns
1)2)3)4)
Row Precharge Time
tRP
12
â
15
â
ns
1)2)3)4)
1) imings are guaranteed with CK/CK differential Slew Rate of 2.0 V/ns. For DQS signals timings are guaranteed with a differential Slew Rate
of 2.0 V/ns in differential strobe mode and a Slew Rate of 1 V/ns in single ended mode. Timings are further guaranteed for normal OCD
drive strength (EMRS(1) A1 = 0) under the âReference Load for Timing Measurementsâ.
2) The CK/CK input reference level (for timing reference to CK/CK) is the point at which CK and CK cross. The DQS / DQS, RDQS / RDQS,
input reference level is the crosspoint when in differential strobe mode; The input reference level for signals other than CK/CK, DQS / DQS,
RDQS / RDQS is defined.
3) Inputs are not recognized as valid until VREF stabilizes. During the period before VREF stabilizes, CKE = 0.2 x VDDQ is recognized as low.
4) The output timing reference voltage level is VTT.
5) tRAS.MAX is calculated from the maximum amount of time a DDR2 device can operate without a refresh command which is equal to 9 x tREFI.
Speed Grade
TABLE 45
Speed Grade Definition Speed Bins for DDR2â533
DDR2â533C
DDR2â533B
Unit Note
QAG Sort Name
â3.7
â37F
CAS-RCD-RP latencies
4â4â4
3â3â3
tCK
Parameter
Symbol
Min. Max.
Min. Max.
â
Clock Frequency
@ CL = 3
tCK
5
8
3.75 8
ns
1)2)3)4)
@ CL = 4
tCK
3.75 8
3.75 8
ns
1)2)3)4)
@ CL = 5
tCK
3.75 8
3.75 8
ns
1)2)3)4)
Row Active Time
tRAS
45
70000
45
70000
ns
1)2)3)4)5)
Row Cycle Time
tRC
60
â
56.25 â
ns
1)2)3)4)
RAS-CAS-Delay
tRCD
15
â
11.25 â
ns
1)2)3)4)
Row Precharge Time
tRP
15
â
11.25 â
ns
1)2)3)4)
1) Timings are guaranteed with CK/CK differential Slew Rate of 2.0 V/ns. For DQS signals timings are guaranteed with a differential Slew
Rate of 2.0 V/ns in differential strobe mode and a Slew Rate of 1 V/ns in single ended mode. Timings are further guaranteed for normal
OCD drive strength (EMRS(1) A1 = 0) under the âReference Load for Timing Measurementsâ.
2) The CK/CK input reference level (for timing reference to CK/CK) is the point at which CK and CK cross. The DQS / DQS, RDQS / RDQS,
input reference level is the crosspoint when in differential strobe mode; The input reference level for signals other than CK/CK, DQS / DQS,
RDQS / RDQS is defined.
Rev. 1.1, 2007-05
41
03292006-YBYM-WG0Z
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