HYS72T128001HR Datasheet, PDF (31/40 Pages) Qimonda AG – 240-Pin Registered DDR SDRAM Modules

Product Type
Internet Data Sheet
HYS72T[128/256]00xHR–[3S/3.7/5]–A
Registered DDR2 SDRAM Modules
Organization
Label Code
JEDEC SPD Revision
Byte#
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
Description
Error Checking SDRAM Width
Not used
Burst Length Supported
Number of Banks on SDRAM Device
Supported CAS Latencies
DIMM Mechanical Characteristics
DIMM Type Information
DIMM Attributes
Component Attributes
t_CK @ CL_MAX -1 (Byte 18) [ns]
t_AC SDRAM @ CL_MAX -1 [ns]
t_CK @ CL_MAX -2 (Byte 18) [ns]
t_AC SDRAM @ CL_MAX -2 [ns]
t_RP.MIN [ns]
t_RRD.MIN [ns]
t_RCD.MIN [ns]
t_RAS.MIN [ns]
Module Density per Rank
t_AS.MIN and t_CS.MIN [ns]
t_AH.MIN and t_CH.MIN [ns]
t_DS.MIN [ns]
t_DH.MIN [ns]
t_WR.MIN [ns]
t_WTR.MIN [ns]
t_RTP.MIN [ns]
Analysis Characteristics
Rev. 1.4, 2007-02
03062006-GD6J-14FP
2 GByte
2 GByte
1 GByte
2 GByte
×72
×72
×72
×72
1 Rank (×4) 1 Rank (×4) 1 Rank (×8) 1 Rank (×4)
PC2–
PC2–
PC2–
PC2–
5300R–555 4200R–444 3200R–333 3200R–333
Rev. 1.2
Rev. 1.1
Rev. 1.2
Rev. 1.1
HEX
04
00
0C
08
38
01
01
05
03
3D
50
50
60
3C
1E
3C
2D
02
20
27
10
17
3C
1E
1E
00
HEX
04
00
0C
08
38
00
01
05
01
3D
50
50
60
3C
1E
3C
2D
02
25
37
10
22
3C
1E
1E
00
HEX
08
00
0C
08
38
00
01
04
01
50
60
50
60
3C
1E
3C
28
01
35
47
15
27
3C
28
1E
00
HEX
04
00
0C
08
38
00
01
05
01
50
60
50
60
3C
1E
3C
28
02
35
47
15
27
3C
28
1E
00
31